Timer0 Phase corected pwm not working HELP

hi, i'm trying make script  testing basic h-bridge external hvic.

i've setup phase corected pwm on 3 timers,  timer 2 , timer 1 seems work fine.
timer0 gives me pwm, it's not phase corrected anny ?



  ddrb=(1<<pinb1)|(1<<pinb2)| (1<<pinb3);   //output 
  ddrd=(1<<pind3)| (1<<pind6)|(1<<pind5); // output
 
  tccr2a |=(1<<com2b1)|(1<<com2b0);
  ocr2a=0;
  ocr2b=0;
  icr1=top;
  tccr2a ^= (1<<com2a1); //clear oc2b on compare match counting, set on down counting
  tccr2b = (1<<wgm20)|(1<<cs20); //phase correct , no prescaling 
 
  tccr1a =(1<<com1b1)|(1<<com1b0); //set oc1a @ match on counting, clear on down counting ; phase correct
  ocr1a=0;
  ocr1b=0;
  icr1=top;
  tccr1a^=(1<<com1a1); //clear oc1b on compare match counting, set on down counting
  tccr1b=(1<<wgm13)|(1<<cs10);  //phase correct , no prescaling 
 
 
  tccr0a |=(1<<com0b1)|(1<<com0b0); //set oc0a @ match on counting, clear on down counting ; phase correct
  ocr0a=0;
  ocr0b=0;
  icr1=top;
  tccr0a^=(1<<com0a1); //clear oc0b on compare match counting, set on down counting
  tccr0b=(1<<wgm00)|(1<<cs00);  //phase correct , no prescaling 

why not make clear values write registers?
you use flags in wrong registers anyway, don't think document
the code better does:

code: [select]


tccr0a = 0xe1 ; //  mode 1, set a, clear b on compare match.
tccr0b = 0x01 ;  // mode 1, prescale divide-by-1
tcnt0 = 0;


wgm00 bit in tccr0a, not tccr0b, hard spot in code, approach forces
you @ relevant section of datasheet check action, have
to anyway...

you can #define register values meaningful names too, better:

code: [select]


#define timer0_phase_correct_seta_clrb_prescale1 0xe101

...
inline void reconfig_timer0 (int config)
{
  tccr0a = config >> 8 ;
  tccr0b = config & 0xff ;
  tcnt0 = 0 ;
}

you free build #defines out of component fields see fit by
oring together:

code: [select]


#define timer0_phase_correct 0x0100
#define timer0_prescale1  0x0001
#define timer0_prescale8  0x0002
#define timer0_seta  0xc000
#define timer0_clra 0x8000
#define timer0_setb  0x3000
#define timer0_clrb 0x2000


etc

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